G11C

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SubclassTitle
5/00 Details of stores covered by group G11C 11/00
5/02 Details of stores covered by group G11C 11/00 Disposition of storage elements, e.g. in the form of a matrix array
5/04 Details of stores covered by group G11C 11/00 Disposition of storage elements, e.g. in the form of a matrix array Supports for storage elements; Mounting or fixing of storage elements on such supports
5/05 Details of stores covered by group G11C 11/00 Disposition of storage elements, e.g. in the form of a matrix array Supports for storage elements; Mounting or fixing of storage elements on such supports Supporting of cores in matrix
5/06 Details of stores covered by group G11C 11/00 Arrangements for interconnecting storage elements electrically, e.g. by wiring
5/08 Details of stores covered by group G11C 11/00 Arrangements for interconnecting storage elements electrically, e.g. by wiring for interconnecting magnetic elements, e.g. toroidal cores
5/10 Details of stores covered by group G11C 11/00 Arrangements for interconnecting storage elements electrically, e.g. by wiring for interconnecting capacitors
5/12 Details of stores covered by group G11C 11/00 Apparatus or processes for interconnecting storage elements, e.g. for threading magnetic cores
5/14 Details of stores covered by group G11C 11/00 Power supply arrangements (auxiliary circuits for stores using semiconductor devices G11C 11/4063, G11C 11/413, G11C 11/4193; in general G05F, H02J, H02M)
7/00 Arrangements for writing information into, or reading information out from, a digital store (G11C 5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C 11/4063, G11C 11/413, G11C 11/4193)
7/02 Arrangements for writing information into, or reading information out from, a digital store (G11C 5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C 11/4063, G11C 11/413, G11C 11/4193) with means for avoiding parasitic signals
7/04 Arrangements for writing information into, or reading information out from, a digital store (G11C 5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C 11/4063, G11C 11/413, G11C 11/4193) with means for avoiding disturbances due to temperature effects
7/06 Arrangements for writing information into, or reading information out from, a digital store (G11C 5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C 11/4063, G11C 11/413, G11C 11/4193) Sense amplifiers; Associated circuits (amplifiers per seH03F, H03K)
7/08 Arrangements for writing information into, or reading information out from, a digital store (G11C 5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C 11/4063, G11C 11/413, G11C 11/4193) Sense amplifiers; Associated circuits (amplifiers per seH03F, H03K) Control thereof
7/10 Arrangements for writing information into, or reading information out from, a digital store (G11C 5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C 11/4063, G11C 11/413, G11C 11/4193) Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers (level conversion circuits in general H03K 19/0175)
7/12 Arrangements for writing information into, or reading information out from, a digital store (G11C 5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C 11/4063, G11C 11/413, G11C 11/4193) Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
7/14 Arrangements for writing information into, or reading information out from, a digital store (G11C 5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C 11/4063, G11C 11/413, G11C 11/4193) Dummy cell management; Sense reference voltage generators
7/16 Arrangements for writing information into, or reading information out from, a digital store (G11C 5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C 11/4063, G11C 11/413, G11C 11/4193) Storage of analogue signals in digital stores using an arrangement comprising analogue/digital (A/D) converters, digital memories and digital/analogue (D/A) converters
7/18 Arrangements for writing information into, or reading information out from, a digital store (G11C 5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C 11/4063, G11C 11/413, G11C 11/4193) Bit line organisation; Bit line lay-out
7/20 Arrangements for writing information into, or reading information out from, a digital store (G11C 5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C 11/4063, G11C 11/413, G11C 11/4193) Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory

Showing 1 to 20 of 196 results