H03L 7/093

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Description

Class  H03L : AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES


Subclass 7/093: Automatic control of frequency or phase; Synchronisation (tuning of resonant circuits in general H03J; synchronising in digital communication systems, see the relevant groups in class H04) using a reference signal applied to a frequency- or phase-locked loop Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal (H03L 7/1 takes precedence; frequency or phase detection comparison in general H03D 3/00, H03D 13/00) using special filtering or amplification characteristics in the loop (H03L 7/087-H03L 7/091 take precedence)

Recent Patents

Patent #TitleFiling DateIssue DatePatent Owner
12261609 Inter-PLL communication in a multi-PLL environmentOct 18, 23Mar 25, 25Shaoxing Yuanfang Semiconductor Co., Ltd.
12261611 Clock signal transitioning for multi-mode audio processing systemsJul 16, 23Mar 25, 25Cirrus Logic, Inc.
12255660 Independently clocking digital loop filter by time-to-digital converter in digital phase-locked loopJun 12, 23Mar 18, 25Cypress Semiconductor Corporation
12242299 Signal synthesizer circuit, signal generator device, and signal synthesis methodNov 02, 22Mar 04, 25Rohde & Schwarz GmbH & Co. KG
12243419 System and method for monitoring personal mobility vehicles in urban environmentsNov 25, 21Mar 04, 25Universitat Politécnica de Valéncia
12224756 Clock and data recovery circuit using neural network circuit to obtain frequency difference informationJan 30, 23Feb 11, 25MediaTek Inc.
12216226 Radar systemMay 04, 22Feb 04, 25NXP B.V.
12218675 Digitally augmented analog phase locked loop with accurate bandwidthOct 09, 20Feb 04, 25Telefonaktiebolaget LM Ericsson ( publ)
12212326 Wireless transmitter with improved data rateFeb 15, 23Jan 28, 25Apple Inc.
12212327 Phase-locked loops (PLL), including time-to-digital converter (TDC) gain calibration circuits and related methodsFeb 27, 23Jan 28, 25Microsoft Technology Licensing, LLC.
12206421 IC with delay-locked loop with widened lock rangeFeb 21, 24Jan 21, 25SambaNova Systems, Inc.
12199623 Apparatus and method to calibrate clock phase mismatchesMar 17, 21Jan 14, 25Intel Corp.
12191866 Linear prediction to suppress spurs in a digital phase-locked loopSep 03, 22Jan 07, 25Not available
12191867 In-situ phase noise compensation for phononic frequency combsJun 13, 23Jan 07, 25HRL Laboratories LLC
12184291 Phase-locked loop circuit with frequency holding and reference frequency smooth switchingSep 03, 24Dec 31, 24MAGNICHIP CO., LTD
12184292 Sub-sampling phase locked loop (SSPLL) with saturated reference feedbackJul 19, 23Dec 31, 24The Regents of the University of Michigan
12184293 Circuit device and oscillatorMar 29, 23Dec 31, 24Seiko Epson Corporation
12185438 Resonant inverter and conversion methodFeb 01, 21Dec 31, 24SIGNIFY HOLDING B.V.
12166493 Loop bandwidth control for fractional-n frequency synthesizerMar 27, 23Dec 10, 24Agilent Technologies Texas Instruments Incorporated
12166494 Modified control loop in a digital phase-locked loopDec 21, 22Dec 10, 24Not available

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Recent Publications

Publication #TitleFiling DatePub DatePatent Owner
2025/0112,627 CLOCK GENERATION WITH GLITCH DETECTION AND HANDLINGSep 20, 24Apr 03, 25Not available
2025/0105,850 WIRELESS COMMUNICATION DEVICE AND METHOD FOR CONTROLLING ACTIVATION OF RF TRANSMISSION SIGNAL GENERATION CIRCUITDec 06, 24Mar 27, 25Not available
2025/0096,805 CHARGE PUMP CIRCUIT AND PHASE-LOCKED LOOP CIRCUITSep 09, 24Mar 20, 25Kioxia Corporation
2025/0096,806 ERROR DETECTORS AND MEMORY DEVICES HAVING ERROR DETECTORS THEREIN, AND METHODS OF PERFORMING ERROR DETECTIONApr 16, 24Mar 20, 25Not available
2025/0096,808 VOLTAGE-CONTROLLED OSCILLATOR AND PHASE-LOCKED LOOPSep 03, 24Mar 20, 25Not available
2025/0080,121 OSCILLATOR WITH PHASE-NOISE CANCELLATIONAug 30, 23Mar 06, 25Anritsu Company
2025/0080,124 PHASE-LOCKED LOOP CIRCUIT INCLUDING A PLURALITY OF CAPACITOR CELLS AND METHOD OF CONTROLLING THE SAMEAug 20, 24Mar 06, 25Samsung Electronics Co., Ltd.
2025/0070,787 LOOP FILTER USED IN PLL, AND PLLNov 12, 24Feb 27, 25Not available
2025/0062,769 Low Noise, Supply Rejecting Linear Phase InterpolatorNov 12, 23Feb 20, 25Not available
2025/0062,770 PHASE-LOCK LOOP USING PHASE CONVERGENCE COMPENSATIONAug 09, 24Feb 20, 25Not available
2025/0047,289 LOOP BANDWIDTH CONTROL FOR FRACTIONAL-N FREQUENCY SYNTHESIZEROct 21, 24Feb 06, 25Not available
2025/0038,751 TWO POINT FREQUENCY SEARCH BASED PLL CONTROLOct 14, 24Jan 30, 25Not available
2025/0030,427 CIRCUIT WITH A PHASE LOCKED LOOP WITH DISTURBANCE RESPONSESNov 30, 23Jan 23, 25Not available
2025/0021,055 USING TIME-TO-DIGITAL CONVERTERS TO DELAY SIGNALS WITH HIGH ACCURACY AND LARGE RANGEMay 24, 24Jan 16, 25Not available
2025/0023,571 FAST TRACKING PLL WITH ANALOG MIXER FOR PHASE DETECTIONNov 30, 22Jan 16, 25Arizona Board of Regents on behalf of Arizona State University
2024/0429,925 Electro-optic Frequency Comb Generation with Harmonic RF ModulationJun 20, 24Dec 26, 24Not available
2024/0396,559 APPARATUS, METHOD AND RECORDING MEDIUM FOR DIGITAL CLOCK AND DATA RECOVERYJan 24, 24Nov 28, 24Not available
2024/0380,405 ULTRA-LOW POWER INSTANT LOCK PHASE LOCK LOOP (PLL)Jul 23, 24Nov 14, 24MAXIM INTEGRATED PRODUCTS, INC.
2024/0372,554 ADAPTIVE FREQUENCY SCALING BASED ON CLOCK CYCLE TIME MEASUREMENTApr 07, 22Nov 07, 24Not available
2024/0372,555 Electronic Devices Having Wireless Transceivers with Reference Clock SelectionMay 04, 23Nov 07, 24Not available

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