H03L 7/08

Sub-Class

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Description

Class  H03L : AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES


Subclass 7/08: Automatic control of frequency or phase; Synchronisation (tuning of resonant circuits in general H03J; synchronising in digital communication systems, see the relevant groups in class H04) using a reference signal applied to a frequency- or phase-locked loop Details of the phase-locked loop

Recent Patents

Patent #TitleFiling DateIssue DatePatent Owner
12267076 Signal receiving apparatus, clock and data recovery circuit and clock and data recovery method thereofAug 25, 23Apr 01, 25Realtek Semiconductor Corporation
12267082 Frequency-regulated oscillator circuitAug 31, 23Apr 01, 25NXP USA, Inc.
12267187 Split-path equalizer and related methods, devices and systemsSep 01, 22Apr 01, 25RAMBUS INC.
12261606 Measuring pin-to-pin delays between clock routesJun 20, 23Mar 25, 25Skyworks Solutions, Inc.
12261607 Multi-path voltage-controlled oscillator with same varactor controlled by inputs from different paths and associated methodMay 31, 23Mar 25, 25MediaTek Inc.
12255676 Signal processing systems and methodsSep 25, 23Mar 18, 25SureWave Technology Limited
12255979 Clock recovery unit adjustmentJan 13, 23Mar 18, 25Keysight Technologies, Inc.
12249990 Apparatus and method for wideband multi-phase clock generationNov 15, 23Mar 11, 25Ciena Corporation
12228670 Communication unit, integrated circuits and method for clock and data synchronizationJun 21, 19Feb 18, 25NXP USA, Inc.
12228960 Interface systemMar 11, 24Feb 18, 25Kioxia Corporation
12231127 System for signal propagation and method of operating the sameJul 14, 23Feb 18, 25Taiwan Semiconductor Manufacturing Company Ltd.
12224743 Buffer for voltage controlled oscillator (VCO) or other applicationsJan 17, 23Feb 11, 25QUALCOMM Incorporated
12224756 Clock and data recovery circuit using neural network circuit to obtain frequency difference informationJan 30, 23Feb 11, 25MediaTek Inc.
12225104 Dynamically weighted exclusive or gate having weighted output segments for phase detection and phase interpolationJun 13, 23Feb 11, 25Not available
12218672 Frequency multiplier calibrationDec 30, 22Feb 04, 25Agilent Technologies Texas Instruments Incorporated
12212328 Phase detectors with extrapolation of timing eventsMay 31, 23Jan 28, 25Analog Devices Inc.
12212645 Reset synchronizing circuit and glitchless clock buffer circuit for preventing start-up failure, and IQ divider circuitSep 07, 23Jan 28, 25Samsung Electronics Co. Ltd.
12199619 Cascaded phase interpolator topology for quadrature-rate multilevel pulse amplitude modulation data samplingJun 27, 23Jan 14, 25NVIDIA Corporation
12199620 Clock data recovery circuitApr 20, 23Jan 14, 25Himax Technologies Limited
12181963 Robust circuitry for passive fundamental componentsSep 24, 21Dec 31, 24QUALCOMM Incorporated

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Recent Publications

Publication #TitleFiling DatePub DatePatent Owner
2025/0105,848 CLOCK DATA RECOVERY CIRCUIT AND APPARATUS INCLUDING THE SAMEAug 20, 24Mar 27, 25Seoul National University R&DB Foundation
2025/0096,847 CONTACTLESS COMMUNICATION DEVICE BY ACTIVE LOAD MODULATIONSep 11, 24Mar 20, 25STMicroelectronics International N.V.
2025/0070,697 SYSTEM AND METHOD FOR DECOUPLING CURRENT COMMAND COMPONENTS IN A SYNCHRONOUSLY-ROTATING FRAMEDec 16, 21Feb 27, 25Not available
2025/0070,785 METHOD TO TEST SYNCHRONOUS DOMAINS DURING STUCK-AT TESTAug 21, 23Feb 27, 25STMicroelectronics International N.V.
2025/0047,288 TRANSMISSION DEVICE, TRANSMISSION/RECEPTION SYSTEM, AND METHOD FOR CONTROLLING TRANSMISSION DEVICESep 29, 22Feb 06, 25Not available
2025/0030,533 Continuously changing system clock in a packet processing module based on load determined by deterministic feedback signalsDec 18, 23Jan 23, 25Ciena Corporation
2025/0015,786 CLOCK DOUBLER, A CLOCK GENERATING DEVICE AND A SEMICONDUCTOR SYSTEM USING THE SAMENov 09, 23Jan 09, 25SK HYNIX INC.
2025/0007,522 PHASE ALIGNING MULTIPLE CHANNEL DIVIDERS WITHOUT STOPPING VCO ROOT CLOCKJun 29, 23Jan 02, 25Not available
2024/0419,208 SIGNAL TRANSMITTING SYSTEM AND SIGNAL TRANSMITTING METHODJun 13, 24Dec 19, 24Realtek Semiconductor Corp.
2024/0406,870 Wake-Up Receiver For Narrowband IoT ApplicationsAug 15, 24Dec 05, 24The Regents of the University of Michigan
2024/0396,559 APPARATUS, METHOD AND RECORDING MEDIUM FOR DIGITAL CLOCK AND DATA RECOVERYJan 24, 24Nov 28, 24Not available
2024/0380,411 CONFIGURABLE VOLTAGE REGULATOR CIRCUIT AND TRANSMITTER CIRCUITJul 23, 24Nov 14, 24Not available
2024/0364,348 SYNCHRONIZATION OF MULTIPLE CLOCK DIVIDERS BY USING LOWER-FREQUENCY CLOCKS AND SLIPPING CYCLESApr 28, 23Oct 31, 24Avago Technologies International Sales Pte. Limited
2024/0356,551 CLOCK RECEIVING CIRCUIT AND ELECTRONIC DEVICEMar 02, 22Oct 24, 24Not available
2024/0356,576 TRANSMISSION OF HIGH-FREQUENCY RADIO SIGNALSJun 28, 24Oct 24, 24Not available
2024/0345,161 Machine Learning Control of Clock DriftJun 27, 24Oct 17, 24Not available
2024/0348,420 TRANSMITTING CLOCK REFERENCE OVER REVERSE CHANNEL IN A BIDIRECTIONAL SERIAL LINKApr 26, 24Oct 17, 24Maxim Integrated Products, Inc.
2024/0322,994 SYSTEM AND METHOD OF CLOCK AND DATA RECOVERYOct 04, 23Sep 26, 24Not available
2024/0303,209 CONTINUOUS ADAPTIVE DATA CAPTURE OPTIMIZATION FOR INTERFACE CIRCUITSMay 15, 24Sep 12, 24Not available
2024/0302,432 BUILT-IN SELF TEST CIRCUIT FOR MEASURING PERFORMANCE OF CLOCK DATA RECOVERY AND SYSTEM-ON-CHIP INCLUDING THE SAMEMar 06, 24Sep 12, 24Samsung Electronics Co. Ltd.

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