Description
Class G11C : STATIC STORES
Subclass 5/06: Details of stores covered by group G11C 11/00 Arrangements for interconnecting storage elements electrically, e.g. by wiring
G11C 5/06
Sub-Class
Stats
- 3,440 US PATENTS IN FORCE
- 440 US APPLICATIONS PENDING
- 283 Total Patent Owners
- 6,320 TOTAL INVENTORS
Recent Patents
| Patent # | Title | Filing Date | Issue Date | Patent Owner |
|---|---|---|---|---|
| 12265477 | Hybrid victim cache and write miss buffer with fence operation | Dec 11, 23 | Apr 01, 25 | Texas Instruments Incorporated |
| 12265489 | Communicating data with stacked memory dies | Sep 18, 23 | Apr 01, 25 | Not available |
| 12266400 | Apparatus and method for ZQ calibration of data transmission driving circuit in memory chip package of multi-memory die structure | Nov 08, 22 | Apr 01, 25 | Electronics and Telecommunications Research Institute |
| 12266404 | Semiconductor storage device | May 02, 24 | Apr 01, 25 | Kioxia Corporation |
| 12266417 | Storage array, and interconnection structure and method for operating thereof | Mar 10, 23 | Apr 01, 25 | ZHEJIANG HIKSTOR TECHNOLOGY CO. , LTD. |
| 12266419 | Semiconductor device | Sep 14, 22 | Apr 01, 25 | Samsung Electronics Co. Ltd. |
| 12267957 | Hybrid pitch through hole connector | Dec 18, 20 | Apr 01, 25 | Intel Corp. |
| 12267997 | Microelectronic devices comprising stack structures having pillars and elliptical conductive contacts | Dec 22, 23 | Apr 01, 25 | Micron Technology Inc. |
| 12268011 | Pillar select transistor for 3-dimensional cross point memory | Dec 10, 20 | Apr 01, 25 | Intel Corp. |
| 12259826 | Methods and apparatus for multi-banked victim cache with dual datapath | Mar 14, 22 | Mar 25, 25 | Texas Instruments Incorporated |
| 12260901 | Signal input buffer for effectively calibrating offset | Jan 20, 23 | Mar 25, 25 | FIDELIX CO., LTD. |
| 12260929 | Semiconductor device including internal transmission path and stacked semiconductor device using the same | Feb 27, 24 | Mar 25, 25 | SK Hynix Inc. |
| 12262647 | Semiconductor device and method for fabricating the same | Mar 01, 24 | Mar 25, 25 | United Microelectronics Corp. |
| 12254915 | Integrated circuit structure and method for forming and operating the same | Aug 31, 23 | Mar 18, 25 | Macronix International Co. Ltd. |
| 12254918 | Write driver boost circuit for memory cells | Jan 02, 24 | Mar 18, 25 | Taiwan Semiconductor Manufacturing Company Ltd. |
| 12254919 | Sub-word line driver placement for memory device | Feb 16, 24 | Mar 18, 25 | Taiwan Semiconductor Manufacturing Company Ltd. |
| 12254946 | Multi-deck non-volatile memory architecture with reduced termination tile area | Sep 23, 21 | Mar 18, 25 | Intel Corp. |
| 12254947 | Semiconductor memories including edge mats having folded digit lines | Aug 23, 22 | Mar 18, 25 | Micron Technology Inc. |
| 12254948 | Standby exit for memory die stack | Apr 19, 22 | Mar 18, 25 | Micron Technology Inc. |
| 12254949 | Memory device | May 09, 23 | Mar 18, 25 | Macronix International Co. Ltd. |
Recent Publications
| Publication # | Title | Filing Date | Pub Date | Patent Owner |
|---|---|---|---|---|
| 2025/0118,341 | STRUCTURES FOR WORD LINE MULTIPLEXING IN THREE-DIMENSIONAL MEMORY ARRAYS | Oct 17, 24 | Apr 10, 25 | Not available |
| 2025/0118,352 | APPARATUSES AND METHODS FOR SINGLE AND MULTI MEMORY CELL ARCHITECTURES | Jun 18, 24 | Apr 10, 25 | Micron Technology Inc. |
| 2025/0118,353 | APPARATUSES AND METHODS FOR SINGLE AND MULTI MEMORY CELL ARCHITECTURES | Jun 18, 24 | Apr 10, 25 | Micron Technology Inc. |
| 2025/0118,354 | SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY CHIP BONDED TO A CMOS CHIP INCLUDING A PERIPHERAL CIRCUIT | Dec 17, 24 | Apr 10, 25 | Kioxia Corporation |
| 2025/0118,361 | TRACKING SCHEME CIRCUIT OF MEMORY DEVICE AND METHODS FOR OPERATING THE SAME | Oct 04, 23 | Apr 10, 25 | Taiwan Semiconductor Manufacturing Company Ltd. |
| 2025/0120,075 | MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | Mar 15, 24 | Apr 10, 25 | SK HYNIX INC. |
| 2025/0111,868 | MULTI-WRITE READ-ONLY MEMORY ARRAY | Dec 05, 23 | Apr 03, 25 | Not available |
| 2025/0107,066 | SEMICONDUCTOR MEMORY DEVICE | Apr 23, 24 | Mar 27, 25 | Not available |
| 2025/0107,084 | SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE, AND METHOD OF OPERATING THE SEMICONDUCTOR DEVICE | Feb 29, 24 | Mar 27, 25 | SK HYNIX INC. |
| 2025/0094,358 | METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRITE MERGING | Dec 03, 24 | Mar 20, 25 | Not available |
| 2025/0094,359 | FULLY PIPELINED READ-MODIFY-WRITE SUPPORT | Dec 03, 24 | Mar 20, 25 | Not available |
| 2025/0092,513 | METHODS FOR DEPOSITING A MOLYBDENUM NITRIDE FILM ON A SURFACE OF A SUBSTRATE BY A CYCLICAL DEPOSITION PROCESS AND RELATED SEMICONDUCTOR DEVICE STRUCTURES INCLUDING A MOLYBDENUM NITRIDE FILM | Dec 05, 24 | Mar 20, 25 | Not available |
| 2025/0095,692 | SEMICONDUCTOR MEMORY DEVICE | Sep 13, 24 | Mar 20, 25 | Kioxia Corporation |
| 2025/0095,693 | CONNECTIONS OF BIT LINES AND WORD LINES IN STACKED MEMORY LAYERS TO A COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR LAYER | Sep 15, 23 | Mar 20, 25 | Intel Corp. |
| 2025/0095,694 | MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | Nov 19, 24 | Mar 20, 25 | SK HYNIX INC. |
| 2025/0095,702 | Computing-In-Memory Architecture | Dec 04, 24 | Mar 20, 25 | Not available |
| 2025/0095,705 | MEMORY DEVICE | Sep 09, 24 | Mar 20, 25 | Kioxia Corporation |
| 2025/0095,733 | STORAGE DEVICE AND METHOD OF CONTROLLING STORAGE DEVICE | Sep 10, 24 | Mar 20, 25 | Not available |
| 2025/0098,158 | MICROELECTRONIC DEVICES INCLUDING SLOT STRUCTURES AND ADDITIONAL SLOT STRUCTURES, AND RELATED MEMORY DEVICES AND ELECTRONIC SYSTEMS | Dec 03, 24 | Mar 20, 25 | Not available |
| 2025/0098,159 | MEMORY DEVICES INCLUDING PAD STRUCTURES | Dec 05, 24 | Mar 20, 25 | Not available |
Top Owners in This Subclass
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Patents Issued To Date - By Filing Year
Average Time to Issuance
- 20 Months (last 2 years Issuances)
- 20 Months (last 5 years Issuances)