Class G06F : ELECTRIC DIGITAL DATA PROCESSING
Subclass 1/10: Details not covered by groups G06F 3/00-G06F 13/00 and G06F 21/00 (architectures of general purpose stored programme computers G06F 15/76) Generating or distributing clock signals or signals derived directly therefrom Distribution of clock signals
| Patent # | Title | Filing Date | Issue Date | Patent Owner |
|---|---|---|---|---|
| 12265417 | Configurable clock macro circuits and methods | Sep 22, 21 | Apr 01, 25 | Altera Corporation |
| 12265485 | Apparatus including parallel pipelines and methods of manufacturing the same | Nov 02, 22 | Apr 01, 25 | Micron Technology Inc. |
| 12259746 | Dynamic clock scaling using compression and serialization | Jul 06, 22 | Mar 25, 25 | Synopsys, Inc. |
| 12253876 | Method for programming an FPGA | Jun 14, 23 | Mar 18, 25 | DSPACE GMBH |
| 12253878 | System and method for global synchronization of time in a distributed processing environment | Feb 12, 24 | Mar 18, 25 | Not available |
| 12253895 | Electronic system and determination method capable of determining reason of cold boot event | Jan 03, 23 | Mar 18, 25 | Realtek Semiconductor Corporation |
| 12248334 | Clock circuits, computing chips, hash boards and data processing devices | Mar 30, 21 | Mar 11, 25 | Shenzhen MicroBT Electronics Technology Co., Ltd. |
| 12248335 | Phase detection circuitry for high-frequency phase error detection | Mar 09, 23 | Mar 11, 25 | Synopsys, Inc. |
| 12248422 | Systems and methods for lane management in a communication bus | May 09, 23 | Mar 11, 25 | QUALCOMM Incorporated |
| 12248761 | Deterministic reset mechanism for asynchronous gearbox FIFOs for predictable latency | Mar 31, 23 | Mar 11, 25 | Xilinx Inc. |
| 12242298 | Register clock driver with chip select loopback | Nov 29, 23 | Mar 04, 25 | RENESAS ELECTRONICS AMERICA INC. |
| 12242739 | Transparently attached flash memory security | Apr 30, 24 | Mar 04, 25 | Microchip Technology Incorporated |
| 12243578 | Read clock start and stop for synchronous memories | Dec 20, 23 | Mar 04, 25 | Advanced Micro Devices Inc. |
| 12235671 | Adding soft logic to flush a pipeline and reduce current ramp | May 19, 23 | Feb 25, 25 | Xilinx Inc. |
| 12235672 | Apparatuses and methods for timing skew calibration | Aug 02, 23 | Feb 25, 25 | Samsung Electronics Co., Ltd. |
| 12236246 | Modular, extensible computer processing architecture | Dec 08, 20 | Feb 25, 25 | Yale University |
| 12228670 | Communication unit, integrated circuits and method for clock and data synchronization | Jun 21, 19 | Feb 18, 25 | NXP USA, Inc. |
| 12228961 | Memory system using asymmetric source-synchronous clocking | Apr 08, 24 | Feb 18, 25 | RAMBUS INC. |
| 12228962 | Clock signal skew calibration apparatus and control method | Jul 27, 23 | Feb 18, 25 | DIODES, INCORPORATED |
| 12229064 | Integrated circuit having lanes interchangeable between clock and data lanes in clock forward interface receiver | Feb 22, 23 | Feb 18, 25 | M31 TECHNOLOGY CORPORATION |
| Publication # | Title | Filing Date | Pub Date | Patent Owner |
|---|---|---|---|---|
| 2025/0117,037 | Adaptive Tuning Of Memory Device Clock Rates Based On Usage Workloads | Oct 09, 23 | Apr 10, 25 | Western Digital Technologies, Inc. |
| 2025/0110,527 | Global and Local Clock Distribution Networks for Multiprocessor Systems | Sep 26, 24 | Apr 03, 25 | Not available |
| 2025/0112,624 | TUNABLE MULTI-PHASE RESONANT CLOCK GENERATION AND DISTRIBUTION | Sep 29, 23 | Apr 03, 25 | Not available |
| 2025/0103,091 | APPARATUSES AND METHODS FOR ADJUSTING SKEWS BETWEEN DATA AND CLOCK | Jun 27, 24 | Mar 27, 25 | Samsung Electronics Co. Ltd. |
| 2025/0103,092 | GLOBAL COUNTER SAVE AND RESTORE | Sep 27, 23 | Mar 27, 25 | Not available |
| 2025/0103,552 | TIME MULTIPLEXING TECHNIQUE TO TRANSFORM SINGLE CORE PROCESSOR IN A MULTICORE PROCESSOR | Sep 21, 23 | Mar 27, 25 | STMicroelectronics International N.V. |
| 2025/0093,903 | APPARATUS AND METHOD FOR CLOCK DISTRIBUTION AND FILTERING | Oct 03, 24 | Mar 20, 25 | Jariet Technologies, Inc. |
| 2025/0093,904 | INTERNAL CLOCK MONITORING USING EXTERNAL CLOCK PROVIDED BY COMMUNICATION INTERFACE | Sep 15, 23 | Mar 20, 25 | Not available |
| 2025/0095,712 | INFORMATION TRANSMISSION METHOD, MEMORY, CONTROL APPARATUS | Nov 17, 24 | Mar 20, 25 | Not available |
| 2025/0085,738 | CLOCK GENERATING CIRCUIT AND CLOCK DISTRIBUTION NETWORK AND SEMICONDUCTOR APPARATUS INCLUDING THE CLOCK GENERATING CIRCUIT | Nov 22, 24 | Mar 13, 25 | SK HYNIX INC. |
| 2025/0068,208 | APPARATUS AND METHOD OF POWER EFFICIENT HIGH-SPEED CLOCK TRANSMISSION | Aug 24, 23 | Feb 27, 25 | Not available |
| 2025/0053,189 | BUFFER CIRCUIT, AND SEMICONDUCTOR APPARATUS CAPABLE OF ADJUSTING A CLOCK RECEIVER AND/OR CHANGING A CLOCK PATH ACCORDING TO FREQUENCY INFORMATION | Dec 19, 23 | Feb 13, 25 | SK HYNIX INC. |
| 2025/0053,190 | CLOCK DISTRIBUTION NETWORK, AND SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM USING THE CLOCK DISTRIBUTION NETWORK | Jan 08, 24 | Feb 13, 25 | SK HYNIX INC. |
| 2025/0053,524 | Clock Generation for Timing Communications with Ranks of Memory Devices | Aug 16, 24 | Feb 13, 25 | Not available |
| 2025/0044,826 | TECHNIQUES FOR CHANNEL CLOCK CONFIGURATIONS | Jul 03, 24 | Feb 06, 25 | Not available |
| 2025/0036,582 | AI ACCELERATOR APPARATUS USING IN-MEMORY COMPUTE CHIPLET DEVICES FOR TRANSFORMER WORKLOADS | Oct 16, 24 | Jan 30, 25 | Not available |
| 2025/0028,660 | MEMORY MODULE WITH TIMING-CONTROLLED DATA BUFFERING | Aug 20, 23 | Jan 23, 25 | Not available |
| 2025/0028,341 | VOLTAGE DETECTOR IN DATA COMMUNICATION INTERFACE | Oct 31, 23 | Jan 23, 25 | Not available |
| 2025/0004,521 | TIMING AND POWER MODELING IN FLEXMBFF COMPILERS | Jun 28, 23 | Jan 02, 25 | Not available |
| 2024/0427,370 | COMMUNICATION BETWEEN CIRCUITS WITH DIFFERENT CLOCK FREQUENCIES | Jun 23, 23 | Dec 26, 24 | Not available |
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