G05F 1/04

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Class  G05F : SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES


Subclass 1/04: Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems Regulating electric characteristics of arcs (arrangements for feeding or moving of electrodes for spot or seam welding or cutting B23K 9/12; arrangements for feeding electrodes for electric heating or electric lighting H05B 7/109, H05B 31/18; automatic control of power for heating by discharge H05B 7/148) by means of saturable magnetic devices

Recent Patents

Patent #TitleFiling DateIssue DatePatent Owner
11228316 Method, system and circuit for multi-die timing signal distributionJul 25, 19Jan 18, 22ARM Limited
11183990 Dead time generator and digital signal processing deviceJun 22, 18Nov 23, 21501 Sharp Kabushiki Kaisha
11128281 Reduced-power electronic circuits with wide-band energy recovery using non-interfering topologiesSep 12, 19Sep 21, 21REZONENT CORPORATION
11038492 Clock pulse generation circuitAug 19, 19Jun 15, 21Apple Inc.
10804908 Clock generator, phase locked loop, apparatus, method and computer program for generating a clock signal, transceiver, and mobile terminalNov 07, 17Oct 13, 20Intel IP Corporation
10141915 Sequenced pulse-width adjustment in a resonant clocking circuitApr 05, 17Nov 27, 18IBM Corporation
8395368 Adaptive voltage position DC-DC regulators and the method thereofSep 22, 09Mar 12, 13MONOLITHIC POWER SYSTEMS, INC.
7724059 Clock scaling circuitOct 29, 04May 25, 10GLOBALFOUNDRIES INC.
7724060 Interface circuit and a clock output method thereforApr 18, 07May 25, 10SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
7503237 Device for adjusting the position of the operating lever of a hydraulic actuatorMar 23, 01Mar 17, 09FRENI BREMBO S.P.A.
7446589 Pulse generation circuitDec 29, 05Nov 04, 08FUJITSU LIMITED
7061294 Clock processing logic and method for determining clock signal characteristics in reference voltage and temperature varying environmentsJan 25, 05Jun 13, 06SK HYNIX INC.
7015741 Adaptive body bias for clock skew compensationDec 23, 03Mar 21, 06INTEL CORPORATION
6836169 Single ended clock signal generator having a differential outputDec 20, 02Dec 28, 04MONTEREY RESEARCH, LLC
5804943 Resonant bilateral charging and discharging circuitMay 12, 95Sep 08, 98TEXAS INSTRUMENTS INCORPORATED
5754072 Programmable circuitry for the generation of precision low noise clock and bias signalsJun 07, 95May 19, 98RAYTHEON COMPANY

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Patents Issued To Date - By Filing Year

1995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019Filing Years0255075100% of Matters Issued

Average Time to Issuance