Clock gating circuit
Number of patents in Portfolio can not be more than 2000
United States of America
Stats
-
Jun 11, 2024
Grant Date -
N/A
app pub date -
Feb 15, 2022
filing date -
Feb 15, 2022
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Provided are semiconductor circuits. A semiconductor circuit includes a first circuit configured to propagate a value of a first node to a second node based on a voltage level of a clock signal; a second circuit configured to propagate a value of the second node to a third node based on the voltage level of the clock signal; and a third circuit configured to determine a value of the third node based on a voltage level of the second node and the voltage level of the clock signal, wherein the first circuit comprises a first transistor gated to a voltage level of the first node, a second transistor connected in series with the first transistor and gated to the voltage level of the third node, and a third transistor connected in parallel with the first and second transistors and gated to a voltage level of the clock signal to provide the value of the first node to the second node.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully