Systems and methods for minimizing static leakage of an integrated circuit

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO RE49854
SERIAL NO

17131912

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Abstract

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A leakage manager system for adequately minimizing static leakage of an integrated circuit is disclosed. The leakage manager system includes a generator configured to generate a control signal to be applied to a sleep transistor. A monitor is configured to determine whether to adjust the control signal to adequately minimize the static leakage. In some embodiments, the monitor includes an emulated sleep transistor. A regulator is configured to adjust the control signal depending on the determination.

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Patent Owner(s)

Patent OwnerAddress
MOSAID TECHNOLOGIES INCORPORATED515 LEGGET DRIVE SUITE 704 OTTAWA K2K 3G4

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Caplan, Randy J Hoschton, US 9 65
Schwake, Steven J San Jose, US 8 65

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