Semiconductor memory device

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United States of America Patent

PATENT NO RE49253
SERIAL NO

15263336

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Abstract

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A CRC code is generated from an original data, a BCH code is generated with respect to the original data and the CRC code, and the original data, the CRC code, and the BCH code are recorded in pages selected from different planes of a plurality of memory chips. An RS code is generated from the original data across pages, a CRC code is generated with respect to the RS code, a BCH code is generated with respect to the RS code and the CRC code, and the RS code, the CRC code, the BCH code are recorded in a memory chip different from a memory chip including the original data. When reading data, error correction is performed on the original data by using the BCH code, and then CRC is calculated. If the number of errors is the number of errors that is correctable by erasure correction using the RS code, the original data is corrected by the erasure correction. If the number of errors exceeds an erasure correction capability of the RS code, normal error correction using the RS code is performed, and further error correction using the BCH code is performed.

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Patent Owner(s)

Patent OwnerAddress
KIOXIA CORPORATION1-21 SHIBAURA 3-CHOME MINATO-KU TOKYO 108-0023

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kanno, Shinichi Tokyo, JP 419 4497

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