Copper electrodeposition in microelectronics
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United States of America Patent
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-
Sep 6, 2022
Grant Date -
N/A
app pub date -
Jul 9, 2018
filing date -
Nov 12, 2004
priority date (Note) -
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status (Latency Note)
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Abstract
An electrolytic plating method and composition for electrolytically plating Cu onto a semiconductor integrated circuit substrate having submicron-sized interconnect features. The composition comprises a source of Cu ions and a suppressor compound comprising polyether groups. The method involves superfilling by rapid bottom-up deposition at a superfill speed by which Cu deposition in a vertical direction from the bottoms of the features to the top openings of the features is substantially greater than Cu deposition on the side walls.
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International Classification(s)
- 2018 Application Filing Year
- C25D Class
- 679 Applications Filed
- 437 Patents Issued To-Date
- 64.36 % Issued To-Date
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- 0 Citation Count
- C25D Class
- 0 % this patent is cited more than
- 3 Age
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