Method of forming semiconductor patterns

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO RE47170
SERIAL NO

13941226

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

Semiconductor patterns are formed by performing trimming simultaneously with the process of depositing the spacer oxide. Alternatively, a first part of the trimming is performed in-situ, immediately before the spacer oxide deposition process in the same chamber in which the spacer oxide deposition is performed whereas a second part of the trimming is performed simultaneously with the process of depositing the spacer oxide. Thus, semiconductor patterns are formed reducing PR footing during PR trimming with direct plasma exposure.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
ASM IP HOLDING B VHOLLAND ALMERE ALMERE FLEVOLAND

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Beynet, Julien Kawasaki, JP 3 2168
Inoue, Naoki Tokyo, JP 177 5427
Park, Hyung Sang Seoul, KR 30 5154

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation

Maintenance Fees

Fee Large entity fee small entity fee micro entity fee due date
7.5 Year Payment $3600.00 $1800.00 $900.00 Jun 18, 2026
11.5 Year Payment $7400.00 $3700.00 $1850.00 Jun 18, 2030
Fee Large entity fee small entity fee micro entity fee
Surcharge - 7.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge - 11.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge after expiration - Late payment is unavoidable $700.00 $350.00 $175.00
Surcharge after expiration - Late payment is unintentional $1,640.00 $820.00 $410.00