Nonvolatile semiconductor memory device
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United States of America Patent
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Jul 17, 2018
Issued Date -
N/A
app pub date -
Jun 4, 2014
filing date -
Sep 16, 2009
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Abstract
A nonvolatile semiconductor memory device includes: a memory unit; and a control unit. The memory unit includes: a multilayer structure including electrode films and interelectrode insulating films alternately stacked; a semiconductor pillar piercing the multilayer structure; insulating films and a memory layer provided between the electrode films and the semiconductor pillar; and a wiring connected to the semiconductor pillar. In an erase operation, the control unit performs: a first operation setting the wiring at a first potential and the electrode film at a second potential lower than the first potential during a first period; and a second operation setting the wiring at a third potential and the electrode film at a fourth potential lower than the third potential during a second period after the first operation. A length of the second period is shorter than the first period, and/or a difference between the third and fourth potentials is smaller than a difference between the first and second potentials.

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Patent Owner(s)
Patent Owner | Address | |
---|---|---|
KIOXIA CORPORATION | TOKYO 108-0023 |
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Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Kirisawa, Ryouhei | Kanagawa-ken, JP | 75 | 3693 |
Kito, Masaru | Kanagawa-ken, JP | 236 | 11925 |
Mikajiri, Yoshimasa | Kanagawa-ken, JP | 41 | 1600 |
Oota, Shigeto | Mie-ken, JP | 39 | 1585 |
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