Method for compensating non-linearity of a sigma-delta analog-to-digital converter
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United States of America Patent
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May 24, 2011
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N/A
app pub date -
Jun 23, 2000
filing date -
Jun 29, 1999
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Expired
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Abstract
The invention concerns a method for compensating the non-linearity of a sigma-delta analog-to-digital converter (A2) with quantization at N levels comprising a digital-to-analog converter (24). The method comprises a calibrating step which consists in transforming the multibit sigma-delta analog-to-digital converter (A2) into a sigma-delta analog-to-digital converter with quantization at three levels, then at two levels. The correction values of each level to be corrected are accurately measured. The method also comprises a normal functioning phase which consists, when the sigma-delta an analog-to-digital converter (A2) is operating with quantization at N levels, in producing an instantaneous correction of errors of the analog-to-digital converter (24) using said correction values.
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