Semiconductor chip with redistribution metal layer
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United States of America Patent
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Jul 15, 2003
Grant Date -
N/A
app pub date -
Jul 15, 2005
filing date -
May 17, 2001
priority date (Note) -
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Abstract
A new method is provided for the creation of Input/Output connection points to a semiconductor device package. An extension is applied to the conventional I/O connect points of a semiconductor device, allowing the original I/O point location to be relocated to a new point of I/O interconnect that may be in the vicinity of the original point of I/O interconnect but can also be located at a distance from this original point of I/O interconnect. Layers of passivation and polyimide are provided for proper creation and protection of the extended and relocated I/O pads. Wire bonding is used to further interconnect the relocated I/O pads.
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