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United States of America Design
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Oct 14, 2014
Grant Date -
N/A
app pub date -
Jul 27, 2012
filing date -
Jul 27, 2012
priority date (Note) -
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Abstract
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
KING'S FLAIR DEVELOPMENT LTD | HONG KONG |
International Classification(s)

- 2012 Application Filing Year
- 0704 Class
- 119 Applications Filed
- 119 Patents Issued To-Date
- 100 % Issued To-Date
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Wong, S W Alex | Hong Kong, HK | 5 | 80 |
# of filed Patents : 5 Total Citations : 80 |
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Patent Citation Ranking
- 1 Citation Count
- 0704 Class
- 0 % this patent is cited more than
- 11 Age
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Maintenance Fees
Fee | Large entity fee | small entity fee | micro entity fee | due date |
---|---|---|---|---|
11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Apr 14, 2026 |
Fee | Large entity fee | small entity fee | micro entity fee |
---|---|---|---|
Surcharge - 11.5 year - Late payment within 6 months | $160.00 | $80.00 | $40.00 |
Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
Full Text
US Patent No: 9728530
Bipolar transistor device
Abstract
A bipolar transistor device includes a substrate and at least one first transistor unit. The first transistor unit includes a first doped well of first conductivity type, at least one first fin-based structure and at least one second fin-based structure. The first fin-based structure includes a first gate strip and first doped fins arranged in the first doped well, and the first gate strip is floating. The second fin-based structure includes a second gate strip and second doped fins arranged in the first doped well, and the second gate strip is floating. The first doped fins, the second doped fins and the first doped well form first BJTs, and the first doped fins and the second doped fins are respectively coupled to high and low voltage terminals.
Description
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