Clock circuit and control method thereof
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United States of America Patent
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Jun 12, 2018
Issued Date -
Sep 28, 2017
app pub date -
Mar 20, 2017
filing date -
Mar 22, 2016
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Abstract
A clock circuit and control method thereof to avoid missing the clock signal generated by the clock circuit when the generated clock signal is synced with an external clock signal, wherein the clock circuit comprises a current compensation circuit and a current control circuit. The clock signal is generated by alternately charging and discharging a capacitor with a charging current based on a sync current and a compensating current when an external clock signal is detected. The compensating current is generated based on a frequency of the external clock signal, and the sync current is provided based on a phase difference between the generated clock signal by the clock circuit and the external clock signal.
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