Method and apparatus for proactive throttling for improved power transitions in a processor core
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United States of America Patent
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Jun 12, 2018
Issued Date -
Sep 17, 2015
app pub date -
Mar 12, 2014
filing date -
Mar 12, 2014
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Abstract
A processor and method are described for performing proactive throttling of execution unit ports. For example, one embodiment of a processor core comprises: a plurality of execution unit ports within an execution stage of the processor core; a scheduler unit to schedule execution of a plurality of operations to the plurality of execution unit ports; and proactive throttling logic to limit acceleration of execution of the operations by the ports to an acceleration level which does not result in significant power supply droops.
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