Apparatus and method for memory-hierarchy aware producer-consumer instruction
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United States of America Patent
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Jun 5, 2018
Issued Date -
Jul 10, 2014
app pub date -
Dec 21, 2011
filing date -
Dec 21, 2011
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Abstract
An apparatus and method are described for efficiently transferring data from a core of a central processing unit (CPU) to a graphics processing unit (GPU). For example, one embodiment of a method comprises: writing data to a buffer within the core of the CPU until a designated amount of data has been written; upon detecting that the designated amount of data has been written, responsively generating an eviction cycle, the eviction cycle causing the data to be transferred from the buffer to a cache accessible by both the core and the GPU; setting an indication to indicate to the GPU that data is available in the cache; and upon the GPU detecting the indication, providing the data to the GPU from the cache upon receipt of a read signal from the GPU.
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