Digital duty cycle correction for frequency multiplier

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United States of America Patent

PATENT NO 9985618
SERIAL NO

15153496

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Abstract

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An apparatus includes a phase detector coupled to an output of a frequency multiplier. A digital loop filter is coupled to the phase detector, and a duty cycle correction circuit is coupled to the digital loop filter.

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Patent Owner(s)

Patent OwnerAddress
QUALCOMM INCORPORATED5775 MOREHOUSE DRIVE SAN DIEGO CA 92121-1714

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Leung, Lai Kan San Marcos, US 64 245
Park, Dongmin San Diego, US 23 122
Park, Jong Min San Diego, US 177 488

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