Integrated circuitry and 3D memory
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United States of America Patent
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May 29, 2018
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app pub date -
Jan 14, 2016
filing date -
Jan 14, 2016
priority date (Note) -
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Abstract
Integrated circuitry has an array circuitry region having a repeating array of electronic components. An adjacent circuitry region is immediately laterally adjacent to and contacts one elongated major peripheral side of the array circuitry region. The adjacent circuitry region is distinct in structure from the array circuitry region where contacting the array circuitry region and distinct in operation from the array circuitry region. The array circuitry region and the adjacent circuitry region have a respective longitudinally non-linear edge at an interface relative one another along the one elongated major peripheral side of the array circuitry region. Other embodiments are disclosed.
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