Clock generating circuit and associated method
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United States of America Patent
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May 22, 2018
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app pub date -
Apr 11, 2017
filing date -
Apr 11, 2017
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Abstract
A clock generating circuit includes: a generating circuit, a reference circuit and an adjusting circuit. The generating circuit generates a clock signal. The reference circuit is coupled to the generating circuit, and generates a reference signal to the generating circuit according to the clock signal, wherein a frequency of the clock signal is varied according to the reference signal when the reference signal is received by the generating circuit. The adjusting circuit generates an adjusting signal and a trigger signal to the generating circuit, wherein the generating circuit refers to the trigger signal to decide whether to adjust the clock signal frequency according to the adjusting signal.
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