Method and apparatus for synchronization
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United States of America Patent
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May 15, 2018
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N/A
app pub date -
Feb 10, 2017
filing date -
Feb 25, 2009
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Abstract
Aspects of the disclosure provide a circuit that includes a clock synchronization circuit. The clock synchronization circuit is configured to determine a sub-cycle offset between a first clock signal and a second clock signal, and select rising/failing edges of the first clock signal and the second clock signal based on the sub-cycle offset for enabling communication between a first clock domain that is operative in response to the first clock signal and a second clock domain that is operative in response to the second clock signal.
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