Memory buffer with data scrambling and error correction
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United States of America Patent
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May 15, 2018
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N/A
app pub date -
Oct 26, 2015
filing date -
Apr 11, 2011
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Abstract
A method for operating a DRAM device. The method includes receiving in a memory buffer in a first memory module hosted by a computing system, a request for data stored in RAM of the first memory module from a host controller of the computing system. The method includes receiving with the memory buffer, the data associated with a RAM, in response to the request and formatting with the memory buffer, the data into a scrambled data in response to a pseudo-random process. The method includes initiating with the memory buffer, transfer of the scrambled data into an interface device.
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