Capacitance minimization switch
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United States of America Patent
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May 8, 2018
Issued Date -
Apr 9, 2015
app pub date -
Oct 16, 2013
filing date -
Oct 7, 2013
priority date (Note) -
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Abstract
A CMOS transmission gate that is compensated for lost current to parasitic capacitance. Parasitic capacitance current is detected by an amplifier and fed back in-phase to the input of the CMOS transmission gate with the gain of the amplifier set to avoid circuit instability. In a first example a transconductance amplifier detects a voltage drop across a resistor in and RC network and the resulting current applied to the input of the transmission gate. A second example uses a current amplifier to detect gate current of the N-channel and P-channel transistors of the transmission gate, and an output current is fed back in phase to the input of the CMOS transmission gate.
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