High speed and low power hashing system and method
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United States of America Patent
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May 1, 2018
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app pub date -
Dec 8, 2014
filing date -
Dec 8, 2014
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Abstract
A system for performing hashing includes a controller for controlling the system and for providing a clock signal; an array of integrated circuits; in each integrated circuit, a plurality of cores for performing hashing; and in each core, a plurality of data expanders and data compressors, the data expanders and the data compressors having pipelined circuitry so that two iterations of a hashing loop are performed for each cycle of the clock signal. A method for performing hashing, includes controlling a system having an array of integrated circuits with a clock signal; performing hashing in a plurality of cores in each integrated circuit; and performing for each cycle of the clock signal, in each core, a plurality of data expansion and data compression operations, using pipelined circuitry so that two iterations of a hashing loop are performed for each cycle of the clock signal.
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