Embedded spin transfer torque memory for cellular neural network based processing unit
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United States of America Patent
Stats
-
May 1, 2018
Issued Date -
N/A
app pub date -
Jul 5, 2017
filing date -
Apr 21, 2017
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An integrated circuit processor having a processing unit that includes a logical circuit with multiple transistors and a top metal landing pad, and an embedded STT memory. The STT memory includes a dielectric layer formed on the top metal landing pad, an adhesion and topography planarization (ATP) layer formed on the dielectric layer, and an MTJ film layer disposed on the ATP layer. The memory may also include bit lines formed on the MTJ film layer. The ATP layer may have multiple layers such as a top layer and a bottom layer. The top layer may act as an etch stop for etching the MTJ film layer on the top. The ATP layer may have a total thickness of 500 A to 4000 A. The bit lines can be configured to send data to the logic circuit of the processing unit to perform one or more convolution neural network computations.
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Patent Citation Ranking
- 26 Citation Count
- G06N Class
- 94.15 % this patent is cited more than
- 7 Age
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