Methods and systems for clocking a physical layer interface

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United States of America Patent

PATENT NO 9948310
SERIAL NO

15145735

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Abstract

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A method for clocking a physical layer (“PHY”) and a controller of a computing device, comprises the steps of: generating a reference clock signal; synchronizing a plurality of clock signals as a function of the reference clock signal; and clocking the controller and the PHY using the plurality of synchronized clock signals.

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Patent Owner(s)

Patent OwnerAddress
SYNOPSYS INC675 ALMANOR AVENUE SUNNYVALE CA 94085

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chalasani, Prasad San Jose, US 25 135
Rao, Venkata N S N Fremont, US 21 56

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