Memory device sensing circuit
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United States of America Patent
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Apr 17, 2018
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N/A
app pub date -
May 12, 2017
filing date -
Oct 7, 2016
priority date (Note) -
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Abstract
A memory device includes a first memory array comprising a first bit cell configured to store a first logical state; and a reference signal provision (RSP) unit, coupled to the first memory array, and configured to provide a first reference signal that represents an average of a discharging rate and a leakage rate of a second memory array. In an embodiment, the first logical state stored by the first bit cell is read out using the first reference signal.
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