Scalable interleaved digital-to-time converter circuit for clock generation
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United States of America Patent
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Apr 10, 2018
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Dec 27, 2016
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Dec 27, 2016
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Abstract
Some embodiments include apparatus and methods using a first digital-to-time converter (DTC) circuit to receive an input clock signal and generate a first clock signal based on the input clock signal, a second DTC circuit to receive the input clock signal and generate a second clock signal based on the input clock signal, and an output circuit to receive the first and second clock signals to generate an output clock signal based on the first and second clock signals.
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