Twin memory cell interconnection structure

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United States of America Patent

PATENT NO 9941012
SERIAL NO

15453663

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Abstract

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Non-volatile memory including rows and columns of memory cells, the columns of memory cells including pairs of twin memory cells including a common selection gate. According to the disclosure, two bitlines are provided per column of memory cells. The adjacent twin memory cells of the same column are not connected to the same bitline while the adjacent non-twin memory cells of the same column are connected to the same bitline.

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Patent Owner(s)

Patent OwnerAddress
STMICROELECTONICS (ROUSSET) SASROUSSET

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
La, Rosa Francesco Rousset, FR 119 736
Niel, Stephan Meylan, FR 48 224
Regnier, Arnaud Les Taillades, FR 48 245

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