Source or emitter follower buffer circuit and method with mirrored current
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United States of America Patent
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Mar 27, 2018
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N/A
app pub date -
Oct 9, 2015
filing date -
Apr 1, 2011
priority date (Note) -
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Abstract
In one aspect, a buffer circuit comprises a source or emitter follower input stage and output stage. A load is provided between the stages which comprises a representation of an output load of the buffer circuit. This improves the circuit linearity whilst enabling a high input impedance to be obtained. In another aspect, a buffer circuit comprises a source or emitter follower output stage. A load is in the form of a filter is provided and which comprises a representation of an output load of the buffer circuit.
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