GaN FET with integrated driver and slew rate control
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Mar 27, 2018
Issued Date -
N/A
app pub date -
Dec 8, 2016
filing date -
Dec 8, 2015
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A power circuit is disclosed. The power circuit includes a power capacitor and a power resistor connected to the power capacitor. The power circuit also includes a power integrated circuit, including a GaN-based substrate, a power FET on the substrate, and a driver on the substrate. The driver is configured to charge a gate of the power FET using current from a power node. The power integrated circuit also includes a first power voltage regulator on the substrate, where the driver is configured to receive current from the capacitor through the resistor while the driver charges the gate of the power FET, and where the first power voltage regulator is configured to provide current to the capacitor while the driver does not charge the gate of the power FET.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully