Enhanced managed runtime environments that support deterministic record and replay
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United States of America Patent
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Mar 27, 2018
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N/A
app pub date -
May 1, 2009
filing date -
May 2, 2008
priority date (Note) -
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Abstract
A system includes a processor configured to: initiate atomic execution of a plurality of instruction units in a thread, starting with a beginning instruction unit in the plurality of instruction units, wherein the plurality of instruction units in the thread are not programmatically specified to be executed atomically; detect an atomicity terminating event during atomic execution of the plurality of instruction units, wherein the atomicity terminating event is triggered by a memory access by another processor; and commit at least some of the one or more memory modification instructions. The system further includes a memory coupled to the processor, configured to provide the processor with the plurality of instruction units.
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