Flash memory structure and fabrication method thereof
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United States of America Patent
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Mar 20, 2018
Issued Date -
N/A
app pub date -
Mar 8, 2017
filing date -
Mar 9, 2016
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Abstract
A method is provided for fabricating a flash memory structure. The method includes providing a substrate; and forming a gate structure and a hard mask layer. The method also includes forming a sidewall structure on side walls of the gate structure and the hard mask layer; and forming an etching barrier layer covering the sidewall structure. In addition, the method includes forming a first dielectric layer; and removing the sidewall structure and the etching barrier layer higher than the first dielectric layer. Moreover, the method includes forming a sacrificial sidewall layer on the side wall of the hard mask layer and above the sidewall structure and the etching barrier layer; and forming a second dielectric layer on the first dielectric layer. Further, the method includes forming a contact hole penetrating through the second dielectric layer and the first dielectric layer; and forming a contact-hole plug in the contact hole.
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