Device and method to assign device pin functionality for multi-processor core devices
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United States of America Patent
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-
Mar 20, 2018
Issued Date -
N/A
app pub date -
Jun 3, 2015
filing date -
Jun 5, 2014
priority date (Note) -
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status (Latency Note)
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Abstract
An embedded device has a plurality of processor cores, each with a plurality of peripheral devices, wherein each peripheral device may have an output, a housing with a plurality of assignable external pins, and a plurality of peripheral pin selection modules for each processing core, wherein each peripheral pin selection module is configured to be programmable to assign an assignable external pin to one of the plurality of peripheral devices of one of the processor cores.
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International Classification(s)
- 2015 Application Filing Year
- G06F Class
- 57200 Applications Filed
- 45873 Patents Issued To-Date
- 80.20 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 0 Citation Count
- G06F Class
- 0 % this patent is cited more than
- 7 Age
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Sep 20, 2025 |
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Sep 20, 2029 |
