Semiconductor device having staggered pillars
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United States of America Patent
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Mar 13, 2018
Grant Date -
Feb 18, 2016
app pub date -
Oct 22, 2015
filing date -
Sep 5, 2012
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Abstract
Provided is a semiconductor device including gate structures provided on a substrate, a separation insulating layer interposed between the gate structures, and a plurality of cell pillars connected to the substrate through each gate structure. Each gate structure may include horizontal electrodes vertically stacked on the substrate, and an interval between adjacent ones of the cell pillars is non-uniform.
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