Systems and methods of clock synchronization between devices on a network

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United States of America Patent

PATENT NO 9912465
SERIAL NO

15138172

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Abstract

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An exemplary method of synchronizing a master clock and a slave clock comprises transmitting a plurality of packets between a master device and a slave device, calculating a first skew between a first pair of the plurality of packets at the slave device and a second skew between the first pair at the master device, calculating a ratio between the first skew and the second skew, providing a slave clock frequency correction to the slave device, calculating a first packet trip delay using a time that the master device initiates sending a packet to the slave device, a time the master device receives a response from the slave device, a corrected time the slave device receives the packet, and a corrected time the slave device initiates sending the response, calculating a first offset based on the first packet trip delay, and providing the first offset to the slave device.

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Patent Owner(s)

Patent OwnerAddress
AVIAT U S INC200 PARKER DRIVE SUITE C100A AUSTIN TX 78728

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Mihelic, Janez Ljubljana, SI 12 109

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