Semiconductor structures and fabrication methods thereof

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United States of America Patent

PATENT NO 9911833
SERIAL NO

15335248

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Abstract

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A method for fabricating a semiconductor structure includes forming a plurality of first fin structures in a peripheral region of a substrate and a plurality of second fin structures in a core region of the substrate, forming a first dummy gate structure including a first dummy oxide layer and a first dummy gate electrode layer on each first fin structure and a second dummy gate structure including a second dummy oxide layer and a second dummy gate electrode layer on each second fin structure. The method further includes removing each first dummy gate structure together with each second dummy gate electrode layer, forming a first gate oxide layer on the exposed portion of each first fin structure, and then removing each second dummy gate oxide layer. The method further includes forming a first gate structure on each first fin structure and a second gate structure on each second fin structure.

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Patent OwnerAddress
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION201203 18 ZHANGJIANG ROAD SHANGHAI PUDONG NEW AREA MUNICIPAL DISTRICT SHANGHAI CITY 201203
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION100176 BEIJING BEIJING DAXING DISTRICT ECONOMIC AND TECHNOLOGICAL DEVELOPMENT ZONE (YIZHUANG) 18 WENCHANG AVENUE MUNICIPAL DISTRICT BEIJING CITY 100176

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Inventor Name Address # of filed Patents Total Citations
Zhou, Fei Shanghai, CN 344 2621

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