Semiconductor device
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United States of America Patent
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Mar 6, 2018
Issued Date -
N/A
app pub date -
Nov 15, 2016
filing date -
May 18, 2009
priority date (Note) -
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Abstract
A graphic data of a first wiring in a first area of a semiconductor wafer may be extracted, which may correspond to a semiconductor chip forming area. The first area may be surrounded by a scribed area of the semiconductor wafer. The first area includes a second area bounded with the scribed area. The second area has a second distance from a boundary between the semiconductor chip forming area and the scribed area to an boundary between the first area and the second area. A first dummy pattern in the first area is laid out to have at least a first distance from the first wiring. A second dummy pattern in the second area is laid out to have at least the first distance from the first wiring and at least a third distance from the first dummy pattern.
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