Corner transistor suppression
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United States of America Patent
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Feb 27, 2018
Grant Date -
Aug 18, 2016
app pub date -
Apr 26, 2016
filing date -
May 20, 2011
priority date (Note) -
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Abstract
The threshold voltage of parasitic transistors formed at corners of shallow trench isolation regions is increased and mobility decreased by employing a high-K dielectric material. Embodiments include STI regions comprising a liner of a high-K dielectric material extending proximate trench corners. Embodiments also include STI regions having a recess formed in the trench, wherein the recess contains a high-K dielectric material, in the form of a layer or spacer, extending proximate trench corners.
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