Mask plate and method for manufacturing array substrate
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United States of America Patent
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Feb 27, 2018
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app pub date -
Jul 28, 2015
filing date -
Feb 6, 2015
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Abstract
The present disclosure provides a mask plate, including a first region corresponding to a GOA region of an array substrate and a second region corresponding to a display region of the array substrate. The first region comprises at least one first aperture, the at least one first aperture is used to form a GI via-hole penetrating through a gate insulating layer at the GOA region, and a gate line is exposed through the GI via-hole. The second region comprises at least one second aperture, the at least one second aperture is a half-tone mask aperture and is used to form a VIA via-hole at the display region, and a source/drain metal layer pattern is exposed through the VIA via-hole.
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