Cut-mask patterning process for FIN-like field effect transistor (FINFET) device
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United States of America Patent
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Feb 27, 2018
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app pub date -
Jan 8, 2016
filing date -
Feb 9, 2012
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Abstract
Disclosed is a mask for use in a lithography system having a defined resolution. The mask comprises first and second patterns that are greater than the defined resolution and a sub-resolution feature that is less than the defined resolution. Portions of the first and second patterns are positioned close to each other and separated by the sub-resolution feature in an intersection area. The size and shape of the sub-resolution feature are such that when the mask is used in the lithography system, a resulting pattern includes the first and second patterns interconnected with each other through the interconnection area.
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