Test setting circuit, semiconductor device, and test setting method
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United States of America Patent
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Feb 27, 2018
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app pub date -
Apr 17, 2015
filing date -
Nov 18, 2014
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Abstract
A test setting circuit includes a first detection unit suitable for detecting whether a first code is sequentially inputted based on a first sequence, at each of first to Nth steps, where N is a natural number; a second detection unit suitable for sequentially receiving a second code through the first to Nth steps, and detecting whether the second code that is sequentially inputted through the first to Nth steps has a value corresponding to a second sequence; and a test setting unit suitable for setting a test mode when it is detected that the first code and the second code are inputted to satisfy the first sequence and the second sequence.
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