Interconnection structures and methods for transfer-printed integrated circuit elements with improved interconnection alignment tolerance
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United States of America Patent
Stats
-
Feb 20, 2018
Issued Date -
N/A
app pub date -
Nov 22, 2011
filing date -
Nov 23, 2010
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An electronic component array includes a backplane substrate, and a plurality of integrated circuit elements on the backplane substrate. Each of the integrated circuit elements includes a chiplet substrate having a connection pad and a conductor element on a surface thereof. The connection pad and the conductor element are electrically separated by an insulating layer that exposes at least a portion of the connection pad. At least one of the integrated circuit elements is misaligned on the backplane substrate relative to a desired position thereon. A plurality of conductive wires are provided on the backplane substrate including the integrated circuit elements thereon, and the connection pad of each of the integrated circuit elements is electrically connected to a respective one of the conductive wires notwithstanding the misalignment of the at least one of the integrated circuit elements. Related fabrication methods are also discussed.
First Claim
Other Claims data not available
Family
International Classification(s)
- 2011 Application Filing Year
- H01L Class
- 19146 Applications Filed
- 15997 Patents Issued To-Date
- 83.56 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 16 Citation Count
- H01L Class
- 87.83 % this patent is cited more than
- 7 Age
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