Wiring substrate and semiconductor device
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United States of America Patent
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Feb 20, 2018
Issued Date -
N/A
app pub date -
Dec 16, 2016
filing date -
Dec 25, 2015
priority date (Note) -
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status (Latency Note)
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Abstract
A wiring substrate includes a first wiring layer that is an uppermost wiring layer, a protective insulation layer that covers the first wiring layer, and a first through hole that extends through the protective insulation layer in a thickness-wise direction to partially expose an upper surface of the first wiring layer. The first through hole includes a recess defined in an upper surface of the protective insulation layer by a curved wall surface and an opening that extends from the upper surface of the first wiring layer to a bottom of the recess and is in communication with the recess. The opening is smaller than the recess in a plan view.
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