Resistive random access memory with high-reliability and manufacturing and control methods thereof
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United States of America Patent
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Feb 20, 2018
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N/A
app pub date -
Nov 24, 2015
filing date -
Nov 26, 2014
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Abstract
A high-reliability resistive random access memory (RRAM). A memory cell of a memory cell array is controlled via a word line, a bit line and a source line. The control unit of the RRAM has a word line decoder, a bit line decoder, and a source line decoder and switch circuit. The word line decoder, the bit line decoder and the source line decoder respectively control the voltage applied to the word line, the voltage applied to the bit line, and the voltage applied to the source line. The switch circuit is switched between a first state and a second state to operate the bit line decoder to apply a voltage to the bit line to read the memory cell and to operate the source line decoder to apply a voltage to the source line to read the memory cell alternately.
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