Circuits, systems, and methods for synchronization of sampling and sample rate setting
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Feb 13, 2018
Issued Date -
N/A
app pub date -
Oct 27, 2016
filing date -
Jan 15, 2016
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Techniques for synchronization between multiple sampling circuits using a single pin interface to control an output data rate are described. The frequency or rate of a signal on this pin can be automatically determined and used to accomplish the required output data rate. Also described are techniques for using a single pin interface that can allow a sampling device to operate either in a master mode that can generate data strobes, or in a slave mode that can receive a convert start signal. Also described are techniques for controlling bandwidth and throughput for individual channels in a multi-channel device using a single pin interface. For example, using various techniques of this disclosure, integer multiple rate control for other channels can be provided thereby providing varying ODR for different channels, which can also control the bandwidth of interest.
First Claim
Other Claims data not available
Family
International Classification(s)
- 2016 Application Filing Year
- H04L Class
- 37326 Applications Filed
- 27972 Patents Issued To-Date
- 74.94 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 0 Citation Count
- H04L Class
- 0 % this patent is cited more than
- 7 Age
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Aug 13, 2025 |
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Aug 13, 2029 |
