Analogue to digital converter
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United States of America Patent
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Feb 13, 2018
Issued Date -
N/A
app pub date -
May 23, 2017
filing date -
May 31, 2016
priority date (Note) -
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status (Latency Note)
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Abstract
A SAR ADC is disclosed. The SAR ADC includes a plurality of SAR-capacitors. For each of the SAR-capacitors, a sampling-switching-block is configured to connect a first plate of the associated SAR-capacitor to either: v-ref-low, v-ref-high or an input-voltage. The SAR ADC also includes an offset-capacitor and an offset-switching-block configured to connect a first plate of the offset-capacitor to either: v-ref-low, or v-ref-high. The SAR ADC further includes a SAR machine configured to provide signals to the sampling-switching-blocks and the offset-switching-block in order to define a calibration-sampling-mode-of-operation, a calibration-conversion-mode-of-operation, a sampling-mode-of-operation and a conversion-mode-of-operation. A code converter is also includes and is configured to subtract the offset-value from the raw-digital-word in order to provide a digital-output-signal.
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