Digital phase locked loop

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United States of America Patent

PATENT NO 9893735
SERIAL NO

15591702

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Abstract

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A phase locked loop circuit (30, 100, 110) includes a controllable oscillator (42) for generating an output signal of desired frequency responsive to a control signal, a first phase detection circuit (32, 102, 112) for generating an output indicative of phase differential responsive to the output signal and a first edge of a reference signal and a second phase detection circuit (34, 104, 114) for generating an output indicative of phase differential responsive to the output signal and a second edge of a reference signal. The control signal to the controllable oscillator (42) is driven by the outputs of the first and second phase detections circuits.

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Patent Owner(s)

Patent OwnerAddress
TEXAS INSTRUMENTS INCORPORATED12500 TI BOULEVARD M/S 3999 DALLAS 75243

International Classification(s)

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  • 2017 Application Filing Year
  • H03L Class
  • 681 Applications Filed
  • 583 Patents Issued To-Date
  • 85.61 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances2017201820192020202120220255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Leipold, Dirk San Jose, US 83 2129
Staszewski, Robert Bogdan Delft, NL 143 1444

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  • 1 Citation Count
  • H03L Class
  • 14.76 % this patent is cited more than
  • 7 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges76372441651101 - 1011 - 2021 - 3031 - 4041 - 5061 - 700255075100125150175200225250275300325350375400

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