Power filtering circuit and method
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United States of America Patent
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Feb 13, 2018
Issued Date -
N/A
app pub date -
May 8, 2015
filing date -
May 8, 2015
priority date (Note) -
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Abstract
A power filter circuit is provided for use in a package substrate for integrated circuits. A first power isolation circuit, having a first inductance, is configured to isolate power provided to one or more die connectors for provision to an integrated circuit die. A second power isolation circuit, having a second inductance, is configured to isolate power provided to one or more printed circuit board (PCB) connectors for provision to a PCB. A power plane electrically connects a first end of the first power isolation circuit to a first end of the second power isolation circuit, forming a “π” power filtering structure in some embodiments. A de-coupling capacitor can be provided as a surface-mount capacitor, or as an embedded capacitor in a core layer of an integrated circuit package.
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